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| CXG1061TN Low Noise Down Conversion Mixer for PHS Description The CXG1061TN is a low noise down conversion mixer MMIC for PHS. This IC is designed using the Sony's GaAs J-FET process. Features * High gain Gc=22 dB (Typ.) * Low distortion Input IP3=-13 dBm (Typ.) * Low LO input power operation PLO=-15 dBm * High image suppression ratio IMR=27 dBc (Typ.) * LO input matching circuit * Single 3 V power supply operation * 10-pin TSSOP package Function Frequency conversion Applications Japan digital cordless telephones (PHS) Structure GaAs J-FET MMIC 10 pin TSSOP (Plastic) Absolute Maximum Ratings (Ta=25 C) * Supply voltage VDD 4.5 V * Input power PIN +5 dBm * Operating temperature Topr -35 to +85 C * Storage temperature Tstg -65 to +150 C Recommended Operating condition * Supply voltage VDD 2.7 to 3.3 V Block Diagram Pin Configuration RFIN 7 RF AMP IF AMP 5 IFOUT VDD (RF AMP) RFIN CAP GND 6 7 8 9 5 IFOUT/VDD (MIX, IF AMP) 4 CAP 3 GND 2 CAP 1 LOIN MIX 1 LOIN VDD (LO AMP) 10 LO AMP Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. --1-- E98335A8Y CXG1061TN Electrical Characteristics VDD=3.0 V, fRF=1.9 GHz, fLO=1.66 GHz, PLO=-15 dBm, RF input and IF output 50 matching; unless otherwise specified (Ta=25 C) Item Current consumption Conversion gain Noise figure Symbol IDD Gc NF Min. -- 19.5 -- Typ. 7 22 3.3 Max. 9 24.5 4.5 Unit mA dB dB Measurement condition When no signal When a small signal When a small signal PRF=-40 dBm offset=600 kHz Conversion by the IM3 suppression ratio for two-wave input When PRF=-40 dBm input When PRF=-40 dBm input Input IP3 IIP3 -15.5 -13 -- dBm Image suppression ratio 1/2 IF suppression ratio LO to RF leak level LO input VSWR IMR 1/2IFR PLK VSWRLO 22 35 -- -- 27 40 -46 2 -- -- -41 3.5 dBc dBc dBm -- (Note) The values shown above are the specified values on the Sony's recommended evaluation board. Recommended Evaluation Board C8 VDD (RF AMP) C7 C5 VDD (MIX, IF AMP) L2 L1 C4 6 VDD RFIN 50 L3 C9 IFOUT 5 4 3 2 1 C3 C6 IFOUT 50 7 RFIN 8 CAP 9 GND CAP L4 C10 GND CAP VDD (LO AMP) C2 C1 10 VDD LOIN LOIN 50 L1 L2 L3 L4 C1 C2 C3 82 nH 3.9 nH 12 nH 10 nH 18 pF 1000 pF 18 pF --2-- C4 C5 C6 C7 C8 C9 C10 5 pF 1000 pF 0.1 F 13 pF 1000 pF 3 pF 1000 pF CXG1061TN Example of Representative Characteristics (Ta=25 C) POUT, IM3 vs. PIN 20 0 POUT-IF output power [dBm] POUT -20 -40 IM3 -60 VDD=3.0V fRF1=1.90GHz fRF2=1.9006GHz fLO=1.66GHz PLO= -15dBm -80 -50 -40 -30 -20 -10 PIN-RF input power [dBm] Gc, NF vs. PLO 25 7 -10 IIP3, PLK vs. PLO -30 Gc-Conversion gain [dB] 23 21 5 NF-Noise figure [dB] IIP3-Input IP3 [dBm] Gc 6 -12 -35 -14 PLK -16 VDD=3.0V fRF=1.90GHz fLO=1.66GHz -20 -15 -10 -5 0 -40 19 NF 17 VDD=3.0V fRF=1.90GHz fLO=1.66GHz -25 -20 -15 -10 -5 0 4 -45 3 -18 -50 15 2 -20 -25 -55 PLO-LO input power [dBm] PLO-LO input power [dBm] --3-- PLK-LO-RF leak level [dBm] IIP3 CXG1061TN Recommended Evaluation Board Front 25mm SONY CXG1061TN EVB IFOUT C8 C7 L2 C4 L1 C6 C3 RFIN L4 C9 L3 C10 C1 C5 LOIN C2 VDD (RF AMP) VDD (LO AMP) GND VDD (MIX, IF AMP) Back VDD (MIX, IF AMP) GND VDD (LO AMP) VDD (RF AMP) Glass fabric-base 4-layer epoxy board (thickness: 0.3 mm x 2) GND for the 2nd and 3rd layers --4-- CXG1061TN Package Outline Unit : mm 10PIN TSSOP(PLASTIC) 1.2MAX 2.8 0.1 10 6 0.1 2.2 0.1 + 0.15 0.1 - 0.05 3.2 0.2 1 5 0.5 0.25 0 to 10 + 0.08 0.22 - 0.07 0.1 M (0.2) + 0.08 0.22 - 0.07 DETAIL A NOTE: Dimension "" does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE TSSOP-10P-L01 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.02g --5-- (0.1) + 0.025 0.12 - 0.015 A 0.45 0.15 |
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